
- E-Mail:
- felix.jentzsch@uni-paderborn.de
- Telefon:
- +49 5251 60-5395
- Büroanschrift:
-
Pohlweg 51
33098 Paderborn - Raum:
- O3.122
Publikationen
Aktuelle Publikationen
SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural Network Accelerators
Y. Umuroglu, C. Berganski, F. Jentzsch, M. Danilowicz, T. Kryjak, C. Bezaitis, M. Sjalander, I. Colbert, T. Preusser, J. Petri-Koenig, M. Blott, (n.d.).
FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers
C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, H. Giefers, in: 2024.
Flexible Industrial Analytics on Reconfigurable Systems-On-Chip
A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, M. Platzner, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universit?t Paderborn, Paderborn, 2023, pp. 225–236.
Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML
F. Jentzsch, in: 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2023.
RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures
F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, M. Platzner, IEEE Micro 42 (2022) 125–133.
Alle Publikationen anzeigen