Mohammed Iftekhar, M.Sc.
Research Associate
- E-Mail:
- iftekhar@hni.uni-paderborn.de
- Phone:
- +49 5251 60-6330
- Office Address:
-
Fürstenallee 11
33102 Paderborn - Room:
- F0.428
- E-Mail:
- ms-ese@upb.de
- Phone:
- +49 5251 60-3202
- Web:
- Homepage
- Office Address:
-
Pohlweg 47-49
33098 Paderborn - Room:
- P1.3.02
Publications
Latest Publications
60-Gb/s 1:4 Demultiplexer in 22-nm FD-SOI Technology Using TSPC Logic: A Circuit-to-System-Level Analysis and Design
B. Sadiye, M. Iftekhar, W. Müller, J.C. Scheytt, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2025).
A 50 Gbps Reference-less NRZ Full-rate Bang-Bang CDR with Automatic Frequency Acquisition in 130 nm SiGe:C BiCMOS Technology
M. Iftekhar, B. Sadiye, W. Müller, J.C. Scheytt, in: IEEE Nordic Circuits and Systems Conference (NORCAS), 2025.
A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing
P. Palomero Bernardo, P. Schmid, O. Bringmann, M. Iftekhar, B. Sadiye, W. Müller, A. Koch, E. Jentsch, A. Sauer, I. Feldner, W. Ecker, in: DATE 24 - Design Automation and Test in Europe, 2024.
ENHANCED PLL CIRCUIT
M. Iftekhar, J.C. Scheytt, International Patent Number: WO/2023/099639, Patent Classification: H03L7/0807(2006.1), H03L7/08(2006.1), H03L7/089(2006.1), H03L7/093(2006.1), 2023.
A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology
M. Iftekhar, H. Gowda, P. Kneuper, B. Sadiye, W. Müller, C. Scheytt, in: 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2023.
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