Dr. Tobias Kenter

Member - PostDoc

Member - PostDoc
Member - PostDoc
Scientific Advisor FPGA Acceleration
Office Address:
Mersinweg 5
33100 Paderborn
Room:
X1.119

Publications

Latest Publications

Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL

M. Meyer, T. Kenter, L. Petrica, K. O’Brien, M. Blott, C. Plessl, ArXiv:2403.18374 (2024).



Optimisation and Evaluation of Breadth First Search with oneAPI/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures

K. Olgu, T. Kenter, J. Nunez-Yanez, S. Mcintosh-Smith, in: Proceedings of the 12th International 365体育_足球比分网¥投注直播官网 on OpenCL and SYCL, ACM, 2024.


Noctua 2 Supercomputer

C. Bauer, T. Kenter, M. Lass, L. Mazur, M. Meyer, H. Nitsche, H. Riebler, R. Schade, M. Schwarz, N. Winnwa, A. Wiens, X. Wu, C. Plessl, J. Simon, Journal of Large-Scale Research Facilities 9 (2024).


Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL

M. Büttner, C. Alt, T. Kenter, H. K?stler, C. Plessl, V. Aizinger, in: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), ACM, 2024.


Show all publications